Hardware Design Basics
This guide covers the fundamentals of hardware design: reading schematics, PCB design, component selection, and design for manufacturability.
Reading Schematics
Common Schematic Symbols
Resistor: ─────/\/\/\───── or ─────█████─────
Capacitor: ─────||───── (non-polarized)
─────|├───── (polarized/electrolytic)
LED: ─────▷|───── (arrow points to cathode/-)
Diode: ─────▷|───── (same as LED)
Transistor (NPN): C
│
B ──┤
│
E
MOSFET (N-ch): D
│
G ──┤
│
S
Ground: ───┴─── or ───▼───
Power: VCC ──┬── or +3.3V ──┬──
Connection: ───●─── (dot = connected)
No Connection: ───┼─── (crossing, no dot = not connected)
ESP32 Reference Schematic
Minimum circuit for ESP32-WROOM module:
┌─────────────────────────┐
│ ESP32-WROOM-32E │
│ │
3.3V ──┬── 10µF ──┬── 100nF ──┬────►│ 3V3 GND │◄── GND
│ │ │ │ │
GND GND GND │ │
│ EN ◄──┬── 10kΩ ── 3.3V │
│ │ │
┌── 10kΩ ── 3.3V │ └── 100nF ── GND │
│ │ │
└── GPIO0 ◄──────────│ IO0 │
(BOOT button) │ │
│ TXD0 ─────────► USB-UART│
│ RXD0 ◄───────── USB-UART│
│ │
└─────────────────────────┘
Auto-Reset Circuit (for programming):
3.3V ──┬── 10kΩ ──┬── EN
│ │
DTR ─┤10µF├──┘
│
RTS ─┤10µF├──┬── GPIO0
│
10kΩ ── 3.3V
Understanding Decoupling
Power Supply IC
│ │
└── Bulk Cap ──┬── Local ──┤
(10µF) │ (100nF) │
GND GND
Why:
- Bulk (10µF): Stores energy for current surges
- Local (100nF): Filters high-frequency noise
- Place 100nF as close to IC power pins as possible
EDA Tools
Tool Comparison
| Tool | Cost | Learning Curve | Features | Best For |
|---|---|---|---|---|
| KiCad | Free | Medium | Full | Professionals, open-source |
| EasyEDA | Free | Easy | Cloud-based | Beginners |
| Altium | $$$ | Steep | Enterprise | Large companies |
| Eagle | $$ | Medium | Good | Hobbyists, small business |
| Fusion 360 | Free* | Medium | Integrated CAD | Mechanical + PCB |
KiCad Overview
KiCad is recommended for serious projects. It's free, powerful, and has excellent ESP32 libraries.
Workflow:
- Schematic Editor (Eeschema): Draw circuit
- Symbol Library: Define component symbols
- PCB Editor (Pcbnew): Route traces
- Footprint Library: Define physical packages
- 3D Viewer: Visualize final board
- Gerber Export: Files for manufacturing
Key Shortcuts:
Schematic:
A - Add symbol
W - Wire
P - Place power symbol
R - Rotate
M - Move
C - Copy
E - Edit properties
PCB:
X - Route track
V - Via
D - Drag
F - Flip (top/bottom)
B - Fill zones
I - Inspect clearances
Installing ESP32 KiCad Libraries
# Clone ESP32 KiCad library
git clone https://github.com/espressif/kicad-libraries.git
# In KiCad:
# Preferences → Manage Symbol Libraries → Add
# Preferences → Manage Footprint Libraries → Add
PCB Design Fundamentals
Layer Stackup
2-Layer Board (Common for Prototypes):
Top Layer: Signal traces, components
Bottom Layer: Ground plane, some signals
4-Layer Board (Recommended for Production):
Top: Signal traces, components
Inner 1: Ground plane
Inner 2: Power plane
Bottom: Signal traces
Trace Width Calculator
For current capacity:
| Trace Width | Current (1oz Cu, 10°C rise) |
|---|---|
| 10 mil | 0.3A |
| 20 mil | 0.7A |
| 40 mil | 1.2A |
| 60 mil | 1.7A |
| 100 mil | 2.5A |
Rule of thumb: 10 mil per 0.3A for external layers.
Via Sizing
Standard via: 0.3mm drill, 0.6mm pad
Small via: 0.2mm drill, 0.45mm pad
Power via: 0.4mm drill, 0.8mm pad
For high current: Use multiple vias in parallel
Design Rules for ESP32
Minimum trace width: 6 mil (0.15mm)
Minimum trace spacing: 6 mil (0.15mm)
Via drill: 0.3mm minimum
Via pad: 0.6mm minimum
Copper to edge: 0.3mm minimum
Recommended for reliability:
Trace width: 8-10 mil
Trace spacing: 8-10 mil
RF/Antenna Considerations
ESP32 Module Placement Guidelines:
┌─────────────────────────────────────┐
│ PCB │
│ ┌───────────────────┐ │
│ │ ESP32 Module │◄─ Antenna │
│ │ │ facing │
│ │ ┌─────────┐ │ board edge │
│ │ │ Antenna │ │ │
│ └────┴─────────┴────┘ │
│ ▲ │
│ │ │
│ No ground │ │
│ plane here ───┘ │
│ │
└─────────────────────────────────────┘
Rules:
1. Keep antenna area clear of copper (top and bottom)
2. No traces under antenna
3. Module at board edge
4. Follow module datasheet keep-out zones
Ground Plane Best Practices
DO:
- Use solid ground plane
- Connect all grounds together
- Place decoupling caps close to ICs
- Use ground vias near bypass caps
DON'T:
- Split ground plane unnecessarily
- Route signals across ground gaps
- Place vias under RF antenna
- Leave floating copper
Component Selection
Passive Components
Resistors:
Package Sizes:
0402: 1.0 × 0.5mm (tiny, hard to hand solder)
0603: 1.6 × 0.8mm (small, hand-solderable with practice)
0805: 2.0 × 1.25mm (recommended for prototypes)
1206: 3.2 × 1.6mm (easy to hand solder)
Common values (E12 series):
1.0, 1.2, 1.5, 1.8, 2.2, 2.7, 3.3, 3.9, 4.7, 5.6, 6.8, 8.2 (×10^n)
Tolerance: 1% or 5% for most applications
Capacitors:
Package Sizes: Same as resistors (0402-1206)
Types:
Ceramic (MLCC): General purpose, 100pF-10µF
Electrolytic: Bulk storage, 10µF-1000µF
Tantalum: Low ESR, 1µF-100µF (polarized!)
Voltage Rating: Use 2× operating voltage minimum
3.3V system → 6.3V or 10V caps
5V system → 10V or 16V caps
Inductors:
For power supplies: Check current rating and DCR
For filtering: Match impedance to frequency
Active Components
Voltage Regulators:
LDO for low current, low dropout:
AP2112K-3.3 (600mA, low dropout)
HT7333 (250mA, ultra-low quiescent)
AMS1117-3.3 (1A, common but higher dropout)
Switching for efficiency:
MP2359 (1.2A, 92% efficient)
TPS62200 (300mA, 95% efficient)
MOSFETs for Switching:
N-channel (low-side switch):
2N7002: Logic level, 300mA
AO3400: Logic level, 5.8A
IRLML6344: 5A, very low Rds(on)
P-channel (high-side switch):
AO3401: -4A, logic level
Si2301: -2.3A, low Vgs(th)
ESD Protection:
USBLC6-2: USB data lines
PRTR5V0U2X: General I/O protection
TVS diodes: Power line protection
Connectors
USB:
Micro-USB: Cheap, fragile
USB-C: Modern, reversible, robust
JST Connectors:
JST-PH: 2.0mm pitch, batteries
JST-SH: 1.0mm pitch, small sensors
JST-XH: 2.5mm pitch, power
Pin Headers:
2.54mm (0.1"): Standard, breadboard compatible
1.27mm (0.05"): Compact, SMD-friendly
Design for Manufacturability (DFM)
PCB Manufacturing Constraints
Standard capabilities (most fabs):
Minimum trace/space: 6/6 mil
Minimum via drill: 0.3mm
Minimum via pad: 0.6mm
Copper weight: 1 oz standard
Board thickness: 1.6mm standard
Silkscreen min: 6 mil line, 32 mil height
Solder mask expansion: 2-4 mil
Advanced capabilities (extra cost):
Trace/space: 4/4 mil or 3/3 mil
Via drill: 0.2mm or 0.15mm
Blind/buried vias
Controlled impedance
Heavy copper (2oz+)
PCB Fabrication Houses
| Fab House | Strength | Turnaround | Best For |
|---|---|---|---|
| JLCPCB | Low cost, fast | 3-5 days | Prototypes |
| PCBWay | Good quality | 3-7 days | Small production |
| OSH Park | US-based, quality | 7-12 days | US hobbyists |
| Seeed Fusion | PCB+Assembly | 7-10 days | Full service |
| 4PCB | High quality | 5-10 days | Production |
Design Checklist
□ Schematic Review
□ Power supply filtering (bulk + local caps)
□ Reset and boot circuits correct
□ All unused pins handled appropriately
□ ESD protection on external interfaces
□ Correct voltage levels (3.3V for ESP32)
□ PCB Layout Review
□ Components placed logically
□ Decoupling caps near IC power pins
□ Ground plane intact (no unnecessary splits)
□ Antenna keep-out zones respected
□ Test points for debugging
□ Mounting holes (M2.5 or M3)
□ Manufacturing Review
□ Design rules pass DRC
□ Silkscreen readable, not over pads
□ Fiducials for pick-and-place (if assembled)
□ Component orientation indicators
□ Board outline correct
Generating Manufacturing Files
Gerber Files (for PCB fab):
Required layers:
*.GTL - Top copper
*.GBL - Bottom copper
*.GTS - Top soldermask
*.GBS - Bottom soldermask
*.GTO - Top silkscreen
*.GBO - Bottom silkscreen
*.GKO - Board outline
*.DRL - Drill file
In KiCad:
File → Plot → Select layers → Plot
File → Fabrication Outputs → Drill Files
Assembly Files (for PCBA):
Required:
BOM (Bill of Materials) - CSV/Excel
CPL (Component Placement List) - CSV
Pick-and-place file - XY coordinates
Format example (JLCPCB):
Designator, Mid X, Mid Y, Layer, Rotation
C1, 10.5mm, 20.3mm, Top, 90
R1, 15.2mm, 22.1mm, Top, 0
ESP32 Minimum Design
Complete Schematic
┌────────────────────────────────────────────────────────────────────┐
│ ESP32 Minimum Design │
├────────────────────────────────────────────────────────────────────┤
│ │
│ POWER INPUT VOLTAGE REGULATOR │
│ ──────────── ───────────────── │
│ VBAT (3.7-4.2V) │
│ │ ┌──────────┐ │
│ └──────────────────────────►│ AP2112K │───► 3V3 │
│ │ │ 3.3V │ │ │
│ │ └──────────┘ │ │
│ 10µF │ 100nF │
│ │ GND │ │
│ GND GND │
│ │
│ ESP32 MODULE │
│ ──────────── │
│ ┌─────────────────────┐ │
│ 3V3 ──┬── 10µF ──►│ 3V3 GND │◄── GND │
│ │ │ │ │
│ 100nF │ EN ◄──┬── 10kΩ ─ 3V3│ │
│ │ │ │ │ │
│ GND │ 100nF │ │
│ │ │ │ │
│ BOOT BTN ─────────│ IO0 GND │ │
│ │ │ │ │
│ 10kΩ ── 3V3 │ TXD0 ──────────► USB│ │
│ │ RXD0 ◄────────── TX│ │
│ │ │ │
│ │ IO2 ◄── 10kΩ ── GND │ (for some modules) │
│ │ │ │
│ │ User GPIO... │ │
│ │ │ │
│ └─────────────────────┘ │
│ │
│ USB-UART (CP2102 or CH340) │
│ ────────────────────────── │
│ ┌─────────────────────┐ │
│ USB ◄────────────►│ CP2102N │ │
│ │ │ │
│ ┌── 100nF ──►│ VDD DTR ─┼──┐ │
│ 3V3 │ │ │ │
│ │ TXD ───► ESP RXD │ 100nF │
│ │ RXD ◄─── ESP TXD │ │ │
│ │ │ ├── ESP EN │
│ │ RTS ────┼──┤ │
│ └─────────────────────┘ 100nF │
│ │ │
│ └── ESP IO0 │
│ │
└────────────────────────────────────────────────────────────────────┘
Bill of Materials (Minimum)
| Qty | Reference | Value | Package | Description |
|---|---|---|---|---|
| 1 | U1 | ESP32-WROOM-32E | Module | WiFi/BT Module |
| 1 | U2 | AP2112K-3.3 | SOT-23-5 | 3.3V LDO |
| 1 | U3 | CP2102N | QFN-28 | USB-UART |
| 2 | C1, C2 | 10µF | 0805 | Bulk capacitors |
| 4 | C3-C6 | 100nF | 0603 | Decoupling |
| 3 | R1-R3 | 10kΩ | 0603 | Pull-ups |
| 1 | SW1 | BOOT | 6x6mm | Boot button |
| 1 | SW2 | RESET | 6x6mm | Reset button |
| 1 | J1 | USB-C | USB-C | USB connector |
| 1 | J2 | JST-PH | 2-pin | Battery connector |
Next Steps
- Start simple: Use development board for prototyping
- Learn KiCad: Follow tutorials, practice with simple boards
- Order prototypes: JLCPCB for cheap, fast iterations
- Iterate: Expect 2-3 board revisions minimum
- Test thoroughly: Before ordering production quantities
Next: Prototyping Stages →